Design and Innovative Implementation on novel 48-1 power conversion architecture
Project Description
Building upon the previous 48-to-1V investigation, the student will review recent literature on state-of-the-art architectures and propose an original implementation for a novel 48-to-1V converter
Supervisor
ZHANG, Weijia
Quota
1
Course type
UROP1100
UROP2100
UROP3100
UROP3200
UROP4100
Applicant's Roles
1. Conduct a comprehensive literature review of state-of-the-art 48V-to-1V converter architectures and synthesize key insights into a formal summary report.
2. Design and validate the proposed architecture using QSpice simulations, ensuring the circuit meets targeted performance specifications (e.g., efficiency, transient response).
3. Develop the hardware prototype by designing the Printed Circuit Board (PCB) layout, assembling the components, and performing rigorous bench testing to evaluate the physical system.
Applicant's Learning Objectives
1. Advanced Power Electronics Theory: Gain a deep understanding of high-step-down (48V-to-1V) DC-DC conversion topologies, identifying the trade-offs between efficiency, power density, and complexity in modern architectures.
2. Proficiency in Circuit Simulation: Develop practical skills in using QSpice to model, analyze, and optimize power converter dynamics and steady-state performance prior to physical implementation.
3. Hands-on Hardware Implementation: Acquire practical experience in the full hardware development cycle, including component selection, PCB layout for power electronics (managing thermal and EMI considerations), hardware assembly, and laboratory troubleshooting/testing methodologies.
Complexity of the project
Challenging