Wide-bandgap (WBG) semiconductor SiC has promising applications in power electronics due to its high breakdown voltage and radio frequency. However, the self-heating caused by the current flow during the operation of these power electronics increases the corresponding working temperature, reducing the carrier’s mobility and the threshold voltage. The heat dissipation capacity of the components (e.g., SiC) in these power electronics, which is strongly related to their thermal properties, is therefore critical for the corresponding performance of these electronics. For instance, the size of 3C-SiC-based metal-oxide-semiconductor field-effect transistors (MOSFETs) is 20 times smaller than that of Si-based MOSFETs when the power density is similar. That is mainly because the thermal conductivity of 3C-SiC (i.e., ~500 W/mK at room temperature) is much higher than that of Si (i.e., ~150 W/mK at room temperature).

The SiC in MOSFETs is usually attached to the substrates (e.g., Si substrate), and the heat dissipation capacity of the corresponding MOSFETs is, therefore, affected by the interfaces between the semiconductor and the substrate. For example, a previous study showed that the maximum temperature of β-Ga2O3/substrate heterostructures decreased from 1860 K to 1153 K when the interfacial thermal conductance (ITC) of β-Ga2O3/substrate heterostructures increased from 10 MW/m2K to 110 MW/m2K. While the SiC has high thermal conductivities, as mentioned above, the heat capacity of the SiC-based electronics may not be as expected since the thermal transport across SiC/substrate interfaces may be poor. It is known that the ITC of SiC-substrate interfaces is determined by the type of substrates, interfacial bond strength, and interfacial morphology. For instance, the ITC at room temperature between 4H-SiC and graphene is 19±1.65 × 103 W/m2K, while the room temperature ITC between 3C-SiC and Si can be as high as 622±123 MW/m2K. For another example, Xu. et al. found that the room temperature ITC of 4H-SiC/Si interfaces can be changed from ~300 MW/m2K to ~1000 MW/m2K when nanopatterns are introduced in the interfacial region. To design the SiC/substrate heterostructures with better heat dissipation performance, it is therefore critical to understand the thermal transport across the interfaces between SiC and the substrate.

In this project, we aim to quantitatively and systematically investigate the thermal transport spectrum across the 3C-SiC/Si, 4H-SiC/Si, and 6H-SiC/Si heterointerfaces in the framework of non-equilibrium molecular dynamics (NEMD) simulations and Boltzmann transport equation.